
MagCardReader.elf:     file format elf32-avr

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .data         000000e0  00800100  00000600  00000694  2**0
                  CONTENTS, ALLOC, LOAD, DATA
  1 .text         00000600  00000000  00000000  00000094  2**1
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .bss          00000103  008001e0  008001e0  00000774  2**0
                  ALLOC
  3 .debug_aranges 00000040  00000000  00000000  00000774  2**0
                  CONTENTS, READONLY, DEBUGGING
  4 .debug_pubnames 0000009e  00000000  00000000  000007b4  2**0
                  CONTENTS, READONLY, DEBUGGING
  5 .debug_info   00000433  00000000  00000000  00000852  2**0
                  CONTENTS, READONLY, DEBUGGING
  6 .debug_abbrev 000002b7  00000000  00000000  00000c85  2**0
                  CONTENTS, READONLY, DEBUGGING
  7 .debug_line   000004df  00000000  00000000  00000f3c  2**0
                  CONTENTS, READONLY, DEBUGGING
  8 .debug_frame  00000090  00000000  00000000  0000141c  2**2
                  CONTENTS, READONLY, DEBUGGING
  9 .debug_str    00000154  00000000  00000000  000014ac  2**0
                  CONTENTS, READONLY, DEBUGGING
 10 .debug_loc    00000168  00000000  00000000  00001600  2**0
                  CONTENTS, READONLY, DEBUGGING
 11 .debug_ranges 00000078  00000000  00000000  00001768  2**0
                  CONTENTS, READONLY, DEBUGGING

Disassembly of section .text:

00000000 <__vectors>:
   0:	0c 94 34 00 	jmp	0x68	; 0x68 <__ctors_end>
   4:	0c 94 53 00 	jmp	0xa6	; 0xa6 <__vector_1>
   8:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
   c:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  10:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  14:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  18:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  1c:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  20:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  24:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  28:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  2c:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  30:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  34:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  38:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  3c:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  40:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  44:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  48:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  4c:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  50:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  54:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  58:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  5c:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  60:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>
  64:	0c 94 51 00 	jmp	0xa2	; 0xa2 <__bad_interrupt>

00000068 <__ctors_end>:
  68:	11 24       	eor	r1, r1
  6a:	1f be       	out	0x3f, r1	; 63
  6c:	cf ef       	ldi	r28, 0xFF	; 255
  6e:	d8 e0       	ldi	r29, 0x08	; 8
  70:	de bf       	out	0x3e, r29	; 62
  72:	cd bf       	out	0x3d, r28	; 61

00000074 <__do_copy_data>:
  74:	11 e0       	ldi	r17, 0x01	; 1
  76:	a0 e0       	ldi	r26, 0x00	; 0
  78:	b1 e0       	ldi	r27, 0x01	; 1
  7a:	e0 e0       	ldi	r30, 0x00	; 0
  7c:	f6 e0       	ldi	r31, 0x06	; 6
  7e:	02 c0       	rjmp	.+4      	; 0x84 <.do_copy_data_start>

00000080 <.do_copy_data_loop>:
  80:	05 90       	lpm	r0, Z+
  82:	0d 92       	st	X+, r0

00000084 <.do_copy_data_start>:
  84:	a0 3e       	cpi	r26, 0xE0	; 224
  86:	b1 07       	cpc	r27, r17
  88:	d9 f7       	brne	.-10     	; 0x80 <.do_copy_data_loop>

0000008a <__do_clear_bss>:
  8a:	12 e0       	ldi	r17, 0x02	; 2
  8c:	a0 ee       	ldi	r26, 0xE0	; 224
  8e:	b1 e0       	ldi	r27, 0x01	; 1
  90:	01 c0       	rjmp	.+2      	; 0x94 <.do_clear_bss_start>

00000092 <.do_clear_bss_loop>:
  92:	1d 92       	st	X+, r1

00000094 <.do_clear_bss_start>:
  94:	a3 3e       	cpi	r26, 0xE3	; 227
  96:	b1 07       	cpc	r27, r17
  98:	e1 f7       	brne	.-8      	; 0x92 <.do_clear_bss_loop>
  9a:	0e 94 ce 00 	call	0x19c	; 0x19c <main>
  9e:	0c 94 fe 02 	jmp	0x5fc	; 0x5fc <_exit>

000000a2 <__bad_interrupt>:
  a2:	0c 94 00 00 	jmp	0	; 0x0 <__vectors>

000000a6 <__vector_1>:
	BSET(SREG,7);		// I-bit in SREG
}

#include <avr/interrupt.h>
ISR(INT0_vect)
{
  a6:	1f 92       	push	r1
  a8:	0f 92       	push	r0
  aa:	0f b6       	in	r0, 0x3f	; 63
  ac:	0f 92       	push	r0
  ae:	11 24       	eor	r1, r1
  b0:	2f 93       	push	r18
  b2:	3f 93       	push	r19
  b4:	8f 93       	push	r24
  b6:	9f 93       	push	r25
  b8:	ef 93       	push	r30
  ba:	ff 93       	push	r31
	StopTimer();
  bc:	80 91 81 00 	lds	r24, 0x0081
  c0:	8e 7f       	andi	r24, 0xFE	; 254
  c2:	80 93 81 00 	sts	0x0081, r24
  c6:	80 91 81 00 	lds	r24, 0x0081
  ca:	8b 7f       	andi	r24, 0xFB	; 251
  cc:	80 93 81 00 	sts	0x0081, r24
	ClearTimer();
  d0:	10 92 85 00 	sts	0x0085, r1
  d4:	10 92 84 00 	sts	0x0084, r1

	if ( !BCHK(PIND,CARD_DATA1) )	// inverse low = 1
  d8:	4c 99       	sbic	0x09, 4	; 9
  da:	15 c0       	rjmp	.+42     	; 0x106 <__vector_1+0x60>
	{
		BSET(GPIOR0,bit);
  dc:	2e b3       	in	r18, 0x1e	; 30
  de:	30 91 e0 01 	lds	r19, 0x01E0
  e2:	81 e0       	ldi	r24, 0x01	; 1
  e4:	90 e0       	ldi	r25, 0x00	; 0
  e6:	02 c0       	rjmp	.+4      	; 0xec <__vector_1+0x46>
  e8:	88 0f       	add	r24, r24
  ea:	99 1f       	adc	r25, r25
  ec:	3a 95       	dec	r19
  ee:	e2 f7       	brpl	.-8      	; 0xe8 <__vector_1+0x42>
  f0:	28 2b       	or	r18, r24
  f2:	2e bb       	out	0x1e, r18	; 30
		--bit;
  f4:	80 91 e0 01 	lds	r24, 0x01E0
  f8:	81 50       	subi	r24, 0x01	; 1
  fa:	80 93 e0 01 	sts	0x01E0, r24
		bDataPresent = 1;
  fe:	81 e0       	ldi	r24, 0x01	; 1
 100:	80 93 e2 02 	sts	0x02E2, r24
 104:	16 c0       	rjmp	.+44     	; 0x132 <__vector_1+0x8c>
	} else if (bDataPresent) {
 106:	80 91 e2 02 	lds	r24, 0x02E2
 10a:	88 23       	and	r24, r24
 10c:	91 f0       	breq	.+36     	; 0x132 <__vector_1+0x8c>
		BCLR(GPIOR0,bit);
 10e:	3e b3       	in	r19, 0x1e	; 30
 110:	20 91 e0 01 	lds	r18, 0x01E0
 114:	81 e0       	ldi	r24, 0x01	; 1
 116:	90 e0       	ldi	r25, 0x00	; 0
 118:	02 c0       	rjmp	.+4      	; 0x11e <__vector_1+0x78>
 11a:	88 0f       	add	r24, r24
 11c:	99 1f       	adc	r25, r25
 11e:	2a 95       	dec	r18
 120:	e2 f7       	brpl	.-8      	; 0x11a <__vector_1+0x74>
 122:	80 95       	com	r24
 124:	83 23       	and	r24, r19
 126:	8e bb       	out	0x1e, r24	; 30
		--bit;
 128:	80 91 e0 01 	lds	r24, 0x01E0
 12c:	81 50       	subi	r24, 0x01	; 1
 12e:	80 93 e0 01 	sts	0x01E0, r24
	}

	if (bit < 0) {
 132:	80 91 e0 01 	lds	r24, 0x01E0
 136:	87 ff       	sbrs	r24, 7
 138:	0f c0       	rjmp	.+30     	; 0x158 <__vector_1+0xb2>
		buff[idx] = (char)GPIOR0;
 13a:	e0 91 e1 02 	lds	r30, 0x02E1
 13e:	f0 e0       	ldi	r31, 0x00	; 0
 140:	8e b3       	in	r24, 0x1e	; 30
 142:	ef 51       	subi	r30, 0x1F	; 31
 144:	fe 4f       	sbci	r31, 0xFE	; 254
 146:	80 83       	st	Z, r24
		++idx;
 148:	80 91 e1 02 	lds	r24, 0x02E1
 14c:	8f 5f       	subi	r24, 0xFF	; 255
 14e:	80 93 e1 02 	sts	0x02E1, r24
		bit = 6;
 152:	86 e0       	ldi	r24, 0x06	; 6
 154:	80 93 e0 01 	sts	0x01E0, r24
	}
		
	StartTimer();
 158:	80 91 81 00 	lds	r24, 0x0081
 15c:	81 60       	ori	r24, 0x01	; 1
 15e:	80 93 81 00 	sts	0x0081, r24
 162:	80 91 81 00 	lds	r24, 0x0081
 166:	84 60       	ori	r24, 0x04	; 4
 168:	80 93 81 00 	sts	0x0081, r24
}
 16c:	ff 91       	pop	r31
 16e:	ef 91       	pop	r30
 170:	9f 91       	pop	r25
 172:	8f 91       	pop	r24
 174:	3f 91       	pop	r19
 176:	2f 91       	pop	r18
 178:	0f 90       	pop	r0
 17a:	0f be       	out	0x3f, r0	; 63
 17c:	0f 90       	pop	r0
 17e:	1f 90       	pop	r1
 180:	18 95       	reti

00000182 <debug>:
}


static void
debug(char const * msg)
{
 182:	cf 93       	push	r28
 184:	df 93       	push	r29
 186:	ec 01       	movw	r28, r24
 188:	03 c0       	rjmp	.+6      	; 0x190 <debug+0xe>
	while(*msg != 0x00)
		USART_tx(*(msg++));
 18a:	21 96       	adiw	r28, 0x01	; 1
 18c:	0e 94 96 02 	call	0x52c	; 0x52c <USART_tx>


static void
debug(char const * msg)
{
	while(*msg != 0x00)
 190:	88 81       	ld	r24, Y
 192:	88 23       	and	r24, r24
 194:	d1 f7       	brne	.-12     	; 0x18a <debug+0x8>
		USART_tx(*(msg++));
}
 196:	df 91       	pop	r29
 198:	cf 91       	pop	r28
 19a:	08 95       	ret

0000019c <main>:
static void InitData(void);
static void debug(char const *);
static void WriteString(const char *);

int main()
{
 19c:	8f 92       	push	r8
 19e:	9f 92       	push	r9
 1a0:	af 92       	push	r10
 1a2:	bf 92       	push	r11
 1a4:	cf 92       	push	r12
 1a6:	df 92       	push	r13
 1a8:	ef 92       	push	r14
 1aa:	ff 92       	push	r15
 1ac:	0f 93       	push	r16
 1ae:	1f 93       	push	r17
 1b0:	df 93       	push	r29
 1b2:	cf 93       	push	r28
 1b4:	cd b7       	in	r28, 0x3d	; 61
 1b6:	de b7       	in	r29, 0x3e	; 62
 1b8:	2d 97       	sbiw	r28, 0x0d	; 13
 1ba:	0f b6       	in	r0, 0x3f	; 63
 1bc:	f8 94       	cli
 1be:	de bf       	out	0x3e, r29	; 62
 1c0:	0f be       	out	0x3f, r0	; 63
 1c2:	cd bf       	out	0x3d, r28	; 61
	char cbuff[5];	// general translation buffer

	// setup STATUS_LED for output
	BSET(DDRB,DDB5);
 1c4:	25 9a       	sbi	0x04, 5	; 4
	BSET(PORTB,CARD_STROBE);	// pullup
 1c6:	2a 9a       	sbi	0x05, 2	; 5
	BSET(PORTB,CARD_DATA1);		
 1c8:	2c 9a       	sbi	0x05, 4	; 5
	BSET(PORTB,CARD_PRESENT);	// card_present goes high 150ms after last tx
 1ca:	2b 9a       	sbi	0x05, 3	; 5

	USART_init(BAUD_57600, INT_NONE);
 1cc:	84 e0       	ldi	r24, 0x04	; 4
 1ce:	60 e0       	ldi	r22, 0x00	; 0
 1d0:	0e 94 60 02 	call	0x4c0	; 0x4c0 <USART_init>
}

static void
InitData(void)
{
	memset(&buff,0,MAX_BUFF_SZ1);
 1d4:	01 ee       	ldi	r16, 0xE1	; 225
 1d6:	11 e0       	ldi	r17, 0x01	; 1
 1d8:	c8 01       	movw	r24, r16
 1da:	60 e0       	ldi	r22, 0x00	; 0
 1dc:	70 e0       	ldi	r23, 0x00	; 0
 1de:	40 e0       	ldi	r20, 0x00	; 0
 1e0:	51 e0       	ldi	r21, 0x01	; 1
 1e2:	0e 94 b2 02 	call	0x564	; 0x564 <memset>
	bit = 6; idx = 0;
 1e6:	86 e0       	ldi	r24, 0x06	; 6
 1e8:	80 93 e0 01 	sts	0x01E0, r24
 1ec:	10 92 e1 02 	sts	0x02E1, r1
	bDataPresent = 0;
 1f0:	10 92 e2 02 	sts	0x02E2, r1
	GPIOR0 = 0x00;
 1f4:	1e ba       	out	0x1e, r1	; 30

void
InitInterrupt(void)
{
	// Setup interrupt
	BSET(EIMSK,INT0);	// external interrupt mask
 1f6:	e8 9a       	sbi	0x1d, 0	; 29
	BSET(EICRA,ISC01);	// falling edge
 1f8:	80 91 69 00 	lds	r24, 0x0069
 1fc:	82 60       	ori	r24, 0x02	; 2
 1fe:	80 93 69 00 	sts	0x0069, r24
	BCLR(EICRA,ISC00);	// falling edge
 202:	80 91 69 00 	lds	r24, 0x0069
 206:	8e 7f       	andi	r24, 0xFE	; 254
 208:	80 93 69 00 	sts	0x0069, r24

	BSET(SREG,7);		// I-bit in SREG
 20c:	8f b7       	in	r24, 0x3f	; 63
 20e:	80 68       	ori	r24, 0x80	; 128
 210:	8f bf       	out	0x3f, r24	; 63

	USART_init(BAUD_57600, INT_NONE);
	InitData();
	InitInterrupt();

	debug("System initialized!\r");
 212:	80 e0       	ldi	r24, 0x00	; 0
 214:	91 e0       	ldi	r25, 0x01	; 1
 216:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
	debug("Checking for data after ");
 21a:	85 e1       	ldi	r24, 0x15	; 21
 21c:	91 e0       	ldi	r25, 0x01	; 1
 21e:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
	debug(itoa((CHECK_TIME/1000),cbuff,10));
 222:	83 e0       	ldi	r24, 0x03	; 3
 224:	90 e0       	ldi	r25, 0x00	; 0
 226:	be 01       	movw	r22, r28
 228:	6c 5f       	subi	r22, 0xFC	; 252
 22a:	7f 4f       	sbci	r23, 0xFF	; 255
 22c:	4a e0       	ldi	r20, 0x0A	; 10
 22e:	50 e0       	ldi	r21, 0x00	; 0
 230:	0e 94 b9 02 	call	0x572	; 0x572 <itoa>
 234:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
	debug("ms\r");
 238:	8e e2       	ldi	r24, 0x2E	; 46
 23a:	91 e0       	ldi	r25, 0x01	; 1
 23c:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
		buff[i] += 0x20;
	}

	char cbuff[3];
	WriteString("\r\rMagnetic card digits: ");
	WriteString(itoa(idx,cbuff,10));
 240:	4e 01       	movw	r8, r28
 242:	08 94       	sec
 244:	81 1c       	adc	r8, r1
 246:	91 1c       	adc	r9, r1

			ProcessData();
			ReadData();			

			idx = 0;
			bit = 6;
 248:	96 e0       	ldi	r25, 0x06	; 6
 24a:	a9 2e       	mov	r10, r25
			bDataPresent = 0;
			memset(&buff,0,MAX_BUFF_SZ1);
 24c:	b0 2e       	mov	r11, r16
 24e:	e1 2e       	mov	r14, r17
		}
		debug("\r");

		cbuff[0] = buff[--i]; cbuff[1] = buff[--i]; cbuff[2] = buff[--i]; cbuff[3] = buff[--i]; cbuff[4] = '\0';
		debug("Expiration: ");
		debug(cbuff); debug("\r");
 250:	89 e0       	ldi	r24, 0x09	; 9
 252:	c8 2e       	mov	r12, r24
 254:	d1 2c       	mov	r13, r1
 256:	cc 0e       	add	r12, r28
 258:	dd 1e       	adc	r13, r29
	debug(itoa((CHECK_TIME/1000),cbuff,10));
	debug("ms\r");

	for (;;)
	{
		if( TCNT1 >= CHECK_TIME)
 25a:	80 91 84 00 	lds	r24, 0x0084
 25e:	90 91 85 00 	lds	r25, 0x0085
 262:	82 54       	subi	r24, 0x42	; 66
 264:	9f 40       	sbci	r25, 0x0F	; 15
 266:	c8 f3       	brcs	.-14     	; 0x25a <main+0xbe>
		{	
			StopTimer();
 268:	80 91 81 00 	lds	r24, 0x0081
 26c:	8e 7f       	andi	r24, 0xFE	; 254
 26e:	80 93 81 00 	sts	0x0081, r24
 272:	80 91 81 00 	lds	r24, 0x0081
 276:	8b 7f       	andi	r24, 0xFB	; 251
 278:	80 93 81 00 	sts	0x0081, r24
			ClearTimer();
 27c:	10 92 85 00 	sts	0x0085, r1
 280:	10 92 84 00 	sts	0x0084, r1
 284:	20 e0       	ldi	r18, 0x00	; 0
 286:	09 c0       	rjmp	.+18     	; 0x29a <main+0xfe>
	uint8_t i;
	for (i = 0; i < (idx-1); i++)
	{
		// Contains a parity bit
		// TODO check parity
		BCLR(buff[i],6);
 288:	ef 51       	subi	r30, 0x1F	; 31
 28a:	fe 4f       	sbci	r31, 0xFE	; 254
 28c:	80 81       	ld	r24, Z
 28e:	8f 7b       	andi	r24, 0xBF	; 191
 290:	80 83       	st	Z, r24

		// and is 0x20 from ASCII
		buff[i] += 0x20;
 292:	80 81       	ld	r24, Z
 294:	80 5e       	subi	r24, 0xE0	; 224
 296:	80 83       	st	Z, r24

void
ProcessData(void)
{
	uint8_t i;
	for (i = 0; i < (idx-1); i++)
 298:	2f 5f       	subi	r18, 0xFF	; 255
 29a:	e2 2f       	mov	r30, r18
 29c:	f0 e0       	ldi	r31, 0x00	; 0
 29e:	80 91 e1 02 	lds	r24, 0x02E1
 2a2:	90 e0       	ldi	r25, 0x00	; 0
 2a4:	01 97       	sbiw	r24, 0x01	; 1
 2a6:	e8 17       	cp	r30, r24
 2a8:	f9 07       	cpc	r31, r25
 2aa:	74 f3       	brlt	.-36     	; 0x288 <main+0xec>
 2ac:	02 e3       	ldi	r16, 0x32	; 50
 2ae:	11 e0       	ldi	r17, 0x01	; 1
 2b0:	04 c0       	rjmp	.+8      	; 0x2ba <main+0x11e>
}

void WriteString(const char * msg)
{
	while (*msg != 0x00)
		USART_tx(*(msg++));
 2b2:	0f 5f       	subi	r16, 0xFF	; 255
 2b4:	1f 4f       	sbci	r17, 0xFF	; 255
 2b6:	0e 94 96 02 	call	0x52c	; 0x52c <USART_tx>
		USART_tx(*(msg++));
}

void WriteString(const char * msg)
{
	while (*msg != 0x00)
 2ba:	f8 01       	movw	r30, r16
 2bc:	80 81       	ld	r24, Z
 2be:	88 23       	and	r24, r24
 2c0:	c1 f7       	brne	.-16     	; 0x2b2 <main+0x116>
		buff[i] += 0x20;
	}

	char cbuff[3];
	WriteString("\r\rMagnetic card digits: ");
	WriteString(itoa(idx,cbuff,10));
 2c2:	80 91 e1 02 	lds	r24, 0x02E1
 2c6:	90 e0       	ldi	r25, 0x00	; 0
 2c8:	b4 01       	movw	r22, r8
 2ca:	4a e0       	ldi	r20, 0x0A	; 10
 2cc:	50 e0       	ldi	r21, 0x00	; 0
 2ce:	0e 94 b9 02 	call	0x572	; 0x572 <itoa>
 2d2:	8c 01       	movw	r16, r24
 2d4:	04 c0       	rjmp	.+8      	; 0x2de <main+0x142>
}

void WriteString(const char * msg)
{
	while (*msg != 0x00)
		USART_tx(*(msg++));
 2d6:	0f 5f       	subi	r16, 0xFF	; 255
 2d8:	1f 4f       	sbci	r17, 0xFF	; 255
 2da:	0e 94 96 02 	call	0x52c	; 0x52c <USART_tx>
		USART_tx(*(msg++));
}

void WriteString(const char * msg)
{
	while (*msg != 0x00)
 2de:	f8 01       	movw	r30, r16
 2e0:	80 81       	ld	r24, Z
 2e2:	88 23       	and	r24, r24
 2e4:	c1 f7       	brne	.-16     	; 0x2d6 <main+0x13a>
	}

	char cbuff[3];
	WriteString("\r\rMagnetic card digits: ");
	WriteString(itoa(idx,cbuff,10));
	USART_tx('\r');
 2e6:	8d e0       	ldi	r24, 0x0D	; 13
 2e8:	0e 94 96 02 	call	0x52c	; 0x52c <USART_tx>
}

void
ReadData(void)
{
	uint8_t i = (idx - 1);
 2ec:	00 91 e1 02 	lds	r16, 0x02E1
	char cbuff[5];

	while (buff[i] != StartSentinel && i != 0) --i;
 2f0:	01 50       	subi	r16, 0x01	; 1
 2f2:	e0 2f       	mov	r30, r16
 2f4:	f0 e0       	ldi	r31, 0x00	; 0
 2f6:	ef 51       	subi	r30, 0x1F	; 31
 2f8:	fe 4f       	sbci	r31, 0xFE	; 254
 2fa:	80 81       	ld	r24, Z
 2fc:	85 32       	cpi	r24, 0x25	; 37
 2fe:	19 f0       	breq	.+6      	; 0x306 <main+0x16a>
 300:	00 23       	and	r16, r16
 302:	b1 f7       	brne	.-20     	; 0x2f0 <main+0x154>
 304:	02 c0       	rjmp	.+4      	; 0x30a <main+0x16e>
	if (i == 0) {
 306:	00 23       	and	r16, r16
 308:	19 f4       	brne	.+6      	; 0x310 <main+0x174>
		debug("Invalid card format. Try swiping again.\r");
 30a:	8b e4       	ldi	r24, 0x4B	; 75
 30c:	91 e0       	ldi	r25, 0x01	; 1
 30e:	c7 c0       	rjmp	.+398    	; 0x49e <main+0x302>
		return;
	}
	debug("Card Format: ");
 310:	84 e7       	ldi	r24, 0x74	; 116
 312:	91 e0       	ldi	r25, 0x01	; 1
 314:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
	USART_tx(buff[--i]);
 318:	f0 2e       	mov	r15, r16
 31a:	fa 94       	dec	r15
 31c:	0f 2d       	mov	r16, r15
 31e:	10 e0       	ldi	r17, 0x00	; 0
 320:	0f 51       	subi	r16, 0x1F	; 31
 322:	1e 4f       	sbci	r17, 0xFE	; 254
 324:	f8 01       	movw	r30, r16
 326:	80 81       	ld	r24, Z
 328:	0e 94 96 02 	call	0x52c	; 0x52c <USART_tx>
	debug("\r");
 32c:	82 e8       	ldi	r24, 0x82	; 130
 32e:	91 e0       	ldi	r25, 0x01	; 1
 330:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
	if (buff[i] == 'B') {
 334:	f8 01       	movw	r30, r16
 336:	80 81       	ld	r24, Z
 338:	82 34       	cpi	r24, 0x42	; 66
 33a:	09 f0       	breq	.+2      	; 0x33e <main+0x1a2>
 33c:	b2 c0       	rjmp	.+356    	; 0x4a2 <main+0x306>

		debug("Account: ");
 33e:	84 e8       	ldi	r24, 0x84	; 132
 340:	91 e0       	ldi	r25, 0x01	; 1
 342:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
 346:	03 c0       	rjmp	.+6      	; 0x34e <main+0x1b2>
		while(buff[--i] != FieldSeparator) {
			USART_tx(buff[i]);
 348:	80 81       	ld	r24, Z
 34a:	0e 94 96 02 	call	0x52c	; 0x52c <USART_tx>
	USART_tx(buff[--i]);
	debug("\r");
	if (buff[i] == 'B') {

		debug("Account: ");
		while(buff[--i] != FieldSeparator) {
 34e:	fa 94       	dec	r15
 350:	ef 2d       	mov	r30, r15
 352:	f0 e0       	ldi	r31, 0x00	; 0
 354:	ef 51       	subi	r30, 0x1F	; 31
 356:	fe 4f       	sbci	r31, 0xFE	; 254
 358:	80 81       	ld	r24, Z
 35a:	8e 35       	cpi	r24, 0x5E	; 94
 35c:	a9 f7       	brne	.-22     	; 0x348 <main+0x1ac>
			USART_tx(buff[i]);
		}
		debug("\r");
 35e:	82 e8       	ldi	r24, 0x82	; 130
 360:	91 e0       	ldi	r25, 0x01	; 1
 362:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
		
		debug("Name: ");
 366:	8e e8       	ldi	r24, 0x8E	; 142
 368:	91 e0       	ldi	r25, 0x01	; 1
 36a:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
 36e:	03 c0       	rjmp	.+6      	; 0x376 <main+0x1da>
		while(buff[--i] != FieldSeparator) {
			USART_tx(buff[i]);
 370:	80 81       	ld	r24, Z
 372:	0e 94 96 02 	call	0x52c	; 0x52c <USART_tx>
			USART_tx(buff[i]);
		}
		debug("\r");
		
		debug("Name: ");
		while(buff[--i] != FieldSeparator) {
 376:	fa 94       	dec	r15
 378:	ef 2d       	mov	r30, r15
 37a:	f0 e0       	ldi	r31, 0x00	; 0
 37c:	ef 51       	subi	r30, 0x1F	; 31
 37e:	fe 4f       	sbci	r31, 0xFE	; 254
 380:	80 81       	ld	r24, Z
 382:	8e 35       	cpi	r24, 0x5E	; 94
 384:	a9 f7       	brne	.-22     	; 0x370 <main+0x1d4>
			USART_tx(buff[i]);
		}
		debug("\r");
 386:	82 e8       	ldi	r24, 0x82	; 130
 388:	91 e0       	ldi	r25, 0x01	; 1
 38a:	0e 94 c1 00 	call	0x182	; 0x182 <debug>

		cbuff[0] = buff[--i]; cbuff[1] = buff[--i]; cbuff[2] = buff[--i]; cbuff[3] = buff[--i]; cbuff[4] = '\0';
 38e:	1f 2d       	mov	r17, r15
 390:	11 50       	subi	r17, 0x01	; 1
 392:	e1 2f       	mov	r30, r17
 394:	f0 e0       	ldi	r31, 0x00	; 0
 396:	ef 51       	subi	r30, 0x1F	; 31
 398:	fe 4f       	sbci	r31, 0xFE	; 254
 39a:	80 81       	ld	r24, Z
 39c:	89 87       	std	Y+9, r24	; 0x09
 39e:	11 50       	subi	r17, 0x01	; 1
 3a0:	e1 2f       	mov	r30, r17
 3a2:	f0 e0       	ldi	r31, 0x00	; 0
 3a4:	ef 51       	subi	r30, 0x1F	; 31
 3a6:	fe 4f       	sbci	r31, 0xFE	; 254
 3a8:	80 81       	ld	r24, Z
 3aa:	8a 87       	std	Y+10, r24	; 0x0a
 3ac:	11 50       	subi	r17, 0x01	; 1
 3ae:	e1 2f       	mov	r30, r17
 3b0:	f0 e0       	ldi	r31, 0x00	; 0
 3b2:	ef 51       	subi	r30, 0x1F	; 31
 3b4:	fe 4f       	sbci	r31, 0xFE	; 254
 3b6:	80 81       	ld	r24, Z
 3b8:	8b 87       	std	Y+11, r24	; 0x0b
 3ba:	11 50       	subi	r17, 0x01	; 1
 3bc:	e1 2f       	mov	r30, r17
 3be:	f0 e0       	ldi	r31, 0x00	; 0
 3c0:	ef 51       	subi	r30, 0x1F	; 31
 3c2:	fe 4f       	sbci	r31, 0xFE	; 254
 3c4:	80 81       	ld	r24, Z
 3c6:	8c 87       	std	Y+12, r24	; 0x0c
 3c8:	1d 86       	std	Y+13, r1	; 0x0d
		debug("Expiration: ");
 3ca:	85 e9       	ldi	r24, 0x95	; 149
 3cc:	91 e0       	ldi	r25, 0x01	; 1
 3ce:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
		debug(cbuff); debug("\r");
 3d2:	c6 01       	movw	r24, r12
 3d4:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
 3d8:	82 e8       	ldi	r24, 0x82	; 130
 3da:	91 e0       	ldi	r25, 0x01	; 1
 3dc:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
		cbuff[0] = buff[--i]; cbuff[1] = buff[--i]; cbuff[2] = buff[--i]; cbuff[3] = '\0';
 3e0:	11 50       	subi	r17, 0x01	; 1
 3e2:	e1 2f       	mov	r30, r17
 3e4:	f0 e0       	ldi	r31, 0x00	; 0
 3e6:	ef 51       	subi	r30, 0x1F	; 31
 3e8:	fe 4f       	sbci	r31, 0xFE	; 254
 3ea:	80 81       	ld	r24, Z
 3ec:	89 87       	std	Y+9, r24	; 0x09
 3ee:	11 50       	subi	r17, 0x01	; 1
 3f0:	e1 2f       	mov	r30, r17
 3f2:	f0 e0       	ldi	r31, 0x00	; 0
 3f4:	ef 51       	subi	r30, 0x1F	; 31
 3f6:	fe 4f       	sbci	r31, 0xFE	; 254
 3f8:	80 81       	ld	r24, Z
 3fa:	8a 87       	std	Y+10, r24	; 0x0a
 3fc:	11 50       	subi	r17, 0x01	; 1
 3fe:	e1 2f       	mov	r30, r17
 400:	f0 e0       	ldi	r31, 0x00	; 0
 402:	ef 51       	subi	r30, 0x1F	; 31
 404:	fe 4f       	sbci	r31, 0xFE	; 254
 406:	80 81       	ld	r24, Z
 408:	8b 87       	std	Y+11, r24	; 0x0b
 40a:	1c 86       	std	Y+12, r1	; 0x0c
		debug("Service code: ");
 40c:	82 ea       	ldi	r24, 0xA2	; 162
 40e:	91 e0       	ldi	r25, 0x01	; 1
 410:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
		debug(cbuff); debug("\r");
 414:	c6 01       	movw	r24, r12
 416:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
 41a:	82 e8       	ldi	r24, 0x82	; 130
 41c:	91 e0       	ldi	r25, 0x01	; 1
 41e:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
		debug("PIN Verification Value: ");
 422:	81 eb       	ldi	r24, 0xB1	; 177
 424:	91 e0       	ldi	r25, 0x01	; 1
 426:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
		cbuff[0] = buff[--i]; cbuff[1] = buff[--i]; cbuff[2] = buff[--i]; cbuff[3] = buff[--i]; cbuff[4] = '\0';
 42a:	11 50       	subi	r17, 0x01	; 1
 42c:	e1 2f       	mov	r30, r17
 42e:	f0 e0       	ldi	r31, 0x00	; 0
 430:	ef 51       	subi	r30, 0x1F	; 31
 432:	fe 4f       	sbci	r31, 0xFE	; 254
 434:	80 81       	ld	r24, Z
 436:	89 87       	std	Y+9, r24	; 0x09
 438:	11 50       	subi	r17, 0x01	; 1
 43a:	e1 2f       	mov	r30, r17
 43c:	f0 e0       	ldi	r31, 0x00	; 0
 43e:	ef 51       	subi	r30, 0x1F	; 31
 440:	fe 4f       	sbci	r31, 0xFE	; 254
 442:	80 81       	ld	r24, Z
 444:	8a 87       	std	Y+10, r24	; 0x0a
 446:	11 50       	subi	r17, 0x01	; 1
 448:	e1 2f       	mov	r30, r17
 44a:	f0 e0       	ldi	r31, 0x00	; 0
 44c:	ef 51       	subi	r30, 0x1F	; 31
 44e:	fe 4f       	sbci	r31, 0xFE	; 254
 450:	80 81       	ld	r24, Z
 452:	8b 87       	std	Y+11, r24	; 0x0b
 454:	01 2f       	mov	r16, r17
 456:	01 50       	subi	r16, 0x01	; 1
 458:	e0 2f       	mov	r30, r16
 45a:	f0 e0       	ldi	r31, 0x00	; 0
 45c:	ef 51       	subi	r30, 0x1F	; 31
 45e:	fe 4f       	sbci	r31, 0xFE	; 254
 460:	80 81       	ld	r24, Z
 462:	8c 87       	std	Y+12, r24	; 0x0c
 464:	1d 86       	std	Y+13, r1	; 0x0d
		debug(cbuff); debug("\r");
 466:	c6 01       	movw	r24, r12
 468:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
 46c:	82 e8       	ldi	r24, 0x82	; 130
 46e:	91 e0       	ldi	r25, 0x01	; 1
 470:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
		debug("Discretionary Data: ");
 474:	8a ec       	ldi	r24, 0xCA	; 202
 476:	91 e0       	ldi	r25, 0x01	; 1
 478:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
 47c:	04 c0       	rjmp	.+8      	; 0x486 <main+0x2ea>
		while(buff[i] != FieldSeparator && buff[i] != StopSentinel) {
			USART_tx(buff[i]);
 47e:	80 81       	ld	r24, Z
 480:	0e 94 96 02 	call	0x52c	; 0x52c <USART_tx>
			--i;
 484:	01 50       	subi	r16, 0x01	; 1
		debug(cbuff); debug("\r");
		debug("PIN Verification Value: ");
		cbuff[0] = buff[--i]; cbuff[1] = buff[--i]; cbuff[2] = buff[--i]; cbuff[3] = buff[--i]; cbuff[4] = '\0';
		debug(cbuff); debug("\r");
		debug("Discretionary Data: ");
		while(buff[i] != FieldSeparator && buff[i] != StopSentinel) {
 486:	e0 2f       	mov	r30, r16
 488:	f0 e0       	ldi	r31, 0x00	; 0
 48a:	ef 51       	subi	r30, 0x1F	; 31
 48c:	fe 4f       	sbci	r31, 0xFE	; 254
 48e:	80 81       	ld	r24, Z
 490:	8e 35       	cpi	r24, 0x5E	; 94
 492:	19 f0       	breq	.+6      	; 0x49a <main+0x2fe>
 494:	80 81       	ld	r24, Z
 496:	8f 33       	cpi	r24, 0x3F	; 63
 498:	91 f7       	brne	.-28     	; 0x47e <main+0x2e2>
			USART_tx(buff[i]);
			--i;
		}
		debug("\r");
 49a:	82 e8       	ldi	r24, 0x82	; 130
 49c:	91 e0       	ldi	r25, 0x01	; 1
 49e:	0e 94 c1 00 	call	0x182	; 0x182 <debug>
			ClearTimer();

			ProcessData();
			ReadData();			

			idx = 0;
 4a2:	10 92 e1 02 	sts	0x02E1, r1
			bit = 6;
 4a6:	a0 92 e0 01 	sts	0x01E0, r10
			bDataPresent = 0;
 4aa:	10 92 e2 02 	sts	0x02E2, r1
			memset(&buff,0,MAX_BUFF_SZ1);
 4ae:	8b 2d       	mov	r24, r11
 4b0:	9e 2d       	mov	r25, r14
 4b2:	60 e0       	ldi	r22, 0x00	; 0
 4b4:	70 e0       	ldi	r23, 0x00	; 0
 4b6:	40 e0       	ldi	r20, 0x00	; 0
 4b8:	51 e0       	ldi	r21, 0x01	; 1
 4ba:	0e 94 b2 02 	call	0x564	; 0x564 <memset>
 4be:	cd ce       	rjmp	.-614    	; 0x25a <main+0xbe>

000004c0 <USART_init>:
// Initialize the UART to b Bd, tx/rx, 8N1, asynchronous mode.
// TODO: Add support for bit size, parity, stop bits, etc
void
USART_init(uint8_t b, uint8_t rxtx)
{
	switch(b)
 4c0:	83 30       	cpi	r24, 0x03	; 3
 4c2:	49 f0       	breq	.+18     	; 0x4d6 <USART_init+0x16>
 4c4:	84 30       	cpi	r24, 0x04	; 4
 4c6:	59 f0       	breq	.+22     	; 0x4de <USART_init+0x1e>
 4c8:	82 30       	cpi	r24, 0x02	; 2
 4ca:	91 f4       	brne	.+36     	; 0x4f0 <USART_init+0x30>
static void
uart_2400(void)
{
	#define BAUD 2400
	#include <util/setbaud.h>
	UBRR0H = UBRRH_VALUE;
 4cc:	81 e0       	ldi	r24, 0x01	; 1
 4ce:	80 93 c5 00 	sts	0x00C5, r24
	UBRR0L = UBRRL_VALUE;
 4d2:	80 ea       	ldi	r24, 0xA0	; 160
 4d4:	10 c0       	rjmp	.+32     	; 0x4f6 <USART_init+0x36>
uart_38400(void)
{
	#undef BAUD // avoid compiler warning
	#define BAUD 38400
	#include <util/setbaud.h>
	UBRR0H = UBRRH_VALUE;
 4d6:	10 92 c5 00 	sts	0x00C5, r1
	UBRR0L = UBRRL_VALUE;
 4da:	89 e1       	ldi	r24, 0x19	; 25
 4dc:	0c c0       	rjmp	.+24     	; 0x4f6 <USART_init+0x36>
uart_57600(void)
{
	#undef BAUD // avoid compiler warning
	#define BAUD 57600
	#include <util/setbaud.h>
	UBRR0H = UBRRH_VALUE;
 4de:	10 92 c5 00 	sts	0x00C5, r1
	UBRR0L = UBRRL_VALUE;
 4e2:	82 e2       	ldi	r24, 0x22	; 34
 4e4:	80 93 c4 00 	sts	0x00C4, r24
	#if USE_2X
	UCSR0A |= (1 << U2X0);
 4e8:	80 91 c0 00 	lds	r24, 0x00C0
 4ec:	82 60       	ori	r24, 0x02	; 2
 4ee:	08 c0       	rjmp	.+16     	; 0x500 <USART_init+0x40>
uart_9600(void)
{
	#undef BAUD
	#define BAUD 9600
	#include <util/setbaud.h>
	UBRR0H = UBRRH_VALUE;
 4f0:	10 92 c5 00 	sts	0x00C5, r1
	UBRR0L = UBRRL_VALUE;
 4f4:	87 e6       	ldi	r24, 0x67	; 103
 4f6:	80 93 c4 00 	sts	0x00C4, r24
	#if USE_2X
	UCSR0A |= (1 << U2X0);
	#else
	UCSR0A &= ~(1 << U2X0);
 4fa:	80 91 c0 00 	lds	r24, 0x00C0
 4fe:	8d 7f       	andi	r24, 0xFD	; 253
 500:	80 93 c0 00 	sts	0x00C0, r24
	default:
		uart_9600(); break;
	}

	// Enable Rx/Tx in register UCSR0B
	UCSR0B 	= (1<<RXEN0)|(1<<TXEN0);
 504:	88 e1       	ldi	r24, 0x18	; 24
 506:	80 93 c1 00 	sts	0x00C1, r24

	// rx/tx interrupt vectors
	if (rxtx) {
 50a:	66 23       	and	r22, r22
 50c:	71 f0       	breq	.+28     	; 0x52a <USART_init+0x6a>
		if (rxtx & INT_RX)
 50e:	60 ff       	sbrs	r22, 0
 510:	05 c0       	rjmp	.+10     	; 0x51c <USART_init+0x5c>
			BSET(UCSR0B,RXCIE0);
 512:	80 91 c1 00 	lds	r24, 0x00C1
 516:	80 68       	ori	r24, 0x80	; 128
 518:	80 93 c1 00 	sts	0x00C1, r24
		if (rxtx & INT_TX)
 51c:	61 ff       	sbrs	r22, 1
 51e:	05 c0       	rjmp	.+10     	; 0x52a <USART_init+0x6a>
			BSET(UCSR0B,TXCIE0);
 520:	80 91 c1 00 	lds	r24, 0x00C1
 524:	80 64       	ori	r24, 0x40	; 64
 526:	80 93 c1 00 	sts	0x00C1, r24
 52a:	08 95       	ret

0000052c <USART_tx>:

// USART_transmit
// Send data to USART buffer for transmission
void
USART_tx(unsigned char data)
{
 52c:	98 2f       	mov	r25, r24
	// Check UDRE0 in UCSR0A.  If 1, then buffer empty.
	loop_until_bit_is_set(UCSR0A,UDRE0);
 52e:	80 91 c0 00 	lds	r24, 0x00C0
 532:	85 ff       	sbrs	r24, 5
 534:	fc cf       	rjmp	.-8      	; 0x52e <USART_tx+0x2>
	UDR0 = data;
 536:	90 93 c6 00 	sts	0x00C6, r25
}
 53a:	08 95       	ret

0000053c <USART_tx_S>:
void
USART_tx_S(const char * data)
{
 53c:	fc 01       	movw	r30, r24
 53e:	07 c0       	rjmp	.+14     	; 0x54e <USART_tx_S+0x12>
// Send data to USART buffer for transmission
void
USART_tx(unsigned char data)
{
	// Check UDRE0 in UCSR0A.  If 1, then buffer empty.
	loop_until_bit_is_set(UCSR0A,UDRE0);
 540:	80 91 c0 00 	lds	r24, 0x00C0
 544:	85 ff       	sbrs	r24, 5
 546:	fc cf       	rjmp	.-8      	; 0x540 <USART_tx_S+0x4>
}
void
USART_tx_S(const char * data)
{
	while(*data != 0x00)
		USART_tx(*(data++));
 548:	31 96       	adiw	r30, 0x01	; 1
void
USART_tx(unsigned char data)
{
	// Check UDRE0 in UCSR0A.  If 1, then buffer empty.
	loop_until_bit_is_set(UCSR0A,UDRE0);
	UDR0 = data;
 54a:	90 93 c6 00 	sts	0x00C6, r25
}
void
USART_tx_S(const char * data)
{
	while(*data != 0x00)
 54e:	90 81       	ld	r25, Z
 550:	99 23       	and	r25, r25
 552:	b1 f7       	brne	.-20     	; 0x540 <USART_tx_S+0x4>
		USART_tx(*(data++));
}
 554:	08 95       	ret

00000556 <USART_rx>:
// USART_receive
// 
unsigned char
USART_rx(void)
{
	loop_until_bit_is_set(UCSR0A,RXC0);
 556:	80 91 c0 00 	lds	r24, 0x00C0
 55a:	87 ff       	sbrs	r24, 7
 55c:	fc cf       	rjmp	.-8      	; 0x556 <USART_rx>
	return UDR0;
 55e:	80 91 c6 00 	lds	r24, 0x00C6
}
 562:	08 95       	ret

00000564 <memset>:
 564:	dc 01       	movw	r26, r24
 566:	01 c0       	rjmp	.+2      	; 0x56a <memset+0x6>
 568:	6d 93       	st	X+, r22
 56a:	41 50       	subi	r20, 0x01	; 1
 56c:	50 40       	sbci	r21, 0x00	; 0
 56e:	e0 f7       	brcc	.-8      	; 0x568 <memset+0x4>
 570:	08 95       	ret

00000572 <itoa>:
 572:	fb 01       	movw	r30, r22
 574:	9f 01       	movw	r18, r30
 576:	e8 94       	clt
 578:	42 30       	cpi	r20, 0x02	; 2
 57a:	c4 f0       	brlt	.+48     	; 0x5ac <itoa+0x3a>
 57c:	45 32       	cpi	r20, 0x25	; 37
 57e:	b4 f4       	brge	.+44     	; 0x5ac <itoa+0x3a>
 580:	4a 30       	cpi	r20, 0x0A	; 10
 582:	29 f4       	brne	.+10     	; 0x58e <itoa+0x1c>
 584:	97 fb       	bst	r25, 7
 586:	1e f4       	brtc	.+6      	; 0x58e <itoa+0x1c>
 588:	90 95       	com	r25
 58a:	81 95       	neg	r24
 58c:	9f 4f       	sbci	r25, 0xFF	; 255
 58e:	64 2f       	mov	r22, r20
 590:	77 27       	eor	r23, r23
 592:	0e 94 ea 02 	call	0x5d4	; 0x5d4 <__udivmodhi4>
 596:	80 5d       	subi	r24, 0xD0	; 208
 598:	8a 33       	cpi	r24, 0x3A	; 58
 59a:	0c f0       	brlt	.+2      	; 0x59e <itoa+0x2c>
 59c:	89 5d       	subi	r24, 0xD9	; 217
 59e:	81 93       	st	Z+, r24
 5a0:	cb 01       	movw	r24, r22
 5a2:	00 97       	sbiw	r24, 0x00	; 0
 5a4:	a1 f7       	brne	.-24     	; 0x58e <itoa+0x1c>
 5a6:	16 f4       	brtc	.+4      	; 0x5ac <itoa+0x3a>
 5a8:	5d e2       	ldi	r21, 0x2D	; 45
 5aa:	51 93       	st	Z+, r21
 5ac:	10 82       	st	Z, r1
 5ae:	c9 01       	movw	r24, r18
 5b0:	0c 94 da 02 	jmp	0x5b4	; 0x5b4 <strrev>

000005b4 <strrev>:
 5b4:	dc 01       	movw	r26, r24
 5b6:	fc 01       	movw	r30, r24
 5b8:	67 2f       	mov	r22, r23
 5ba:	71 91       	ld	r23, Z+
 5bc:	77 23       	and	r23, r23
 5be:	e1 f7       	brne	.-8      	; 0x5b8 <strrev+0x4>
 5c0:	32 97       	sbiw	r30, 0x02	; 2
 5c2:	04 c0       	rjmp	.+8      	; 0x5cc <strrev+0x18>
 5c4:	7c 91       	ld	r23, X
 5c6:	6d 93       	st	X+, r22
 5c8:	70 83       	st	Z, r23
 5ca:	62 91       	ld	r22, -Z
 5cc:	ae 17       	cp	r26, r30
 5ce:	bf 07       	cpc	r27, r31
 5d0:	c8 f3       	brcs	.-14     	; 0x5c4 <strrev+0x10>
 5d2:	08 95       	ret

000005d4 <__udivmodhi4>:
 5d4:	aa 1b       	sub	r26, r26
 5d6:	bb 1b       	sub	r27, r27
 5d8:	51 e1       	ldi	r21, 0x11	; 17
 5da:	07 c0       	rjmp	.+14     	; 0x5ea <__udivmodhi4_ep>

000005dc <__udivmodhi4_loop>:
 5dc:	aa 1f       	adc	r26, r26
 5de:	bb 1f       	adc	r27, r27
 5e0:	a6 17       	cp	r26, r22
 5e2:	b7 07       	cpc	r27, r23
 5e4:	10 f0       	brcs	.+4      	; 0x5ea <__udivmodhi4_ep>
 5e6:	a6 1b       	sub	r26, r22
 5e8:	b7 0b       	sbc	r27, r23

000005ea <__udivmodhi4_ep>:
 5ea:	88 1f       	adc	r24, r24
 5ec:	99 1f       	adc	r25, r25
 5ee:	5a 95       	dec	r21
 5f0:	a9 f7       	brne	.-22     	; 0x5dc <__udivmodhi4_loop>
 5f2:	80 95       	com	r24
 5f4:	90 95       	com	r25
 5f6:	bc 01       	movw	r22, r24
 5f8:	cd 01       	movw	r24, r26
 5fa:	08 95       	ret

000005fc <_exit>:
 5fc:	f8 94       	cli

000005fe <__stop_program>:
 5fe:	ff cf       	rjmp	.-2      	; 0x5fe <__stop_program>
